In a Controller Area Network (CAN), each node is connected to the serial CAN bus through an associated CAN communication module. The CAN communication module is the link between the CAN bus with its communication in accordance with the CAN protocol and a connected device. The connected device has a controller with a central processing unit (CPU) and a bus to which the communication module is connected through its module interface. Messages to be exchanged between the CAN bus and the CPU are buffered in a message RAM, also referred to as “Mailbox” RAM. To avoid any read/write conflicts at the message RAM and at the registers of the module interface, the conditions of these elements must be monitored. In order to reduce the CPU load, a CAN message handler is provided which performs all functions concerning safe message handling.
One requirement of the CAN protocol is bit timing. The nominal bit time is equal to 1 divided by the bit rate, which can be up to 1 MBit/s. The nominal bit time is divided into a synchronization segment, a propagation time segment and two phase buffer segments, the sample point being intermediate the two phase buffer segments. Since the bit timing is directly influenced by the clock used in the communication module, a clock signal with a frequency jitter of not more than 1.5% is needed for proper operation of the module. For more details, reference is made to the ISO 11898 standard.
In specific environments such as in automotive applications, low electromagnetic interference (EMI) is a requirement. Since electromagnetic interference depends on the frequency distribution, embedded systems are provided with a frequency modulated system clock to spread the spectrum of emitted frequencies. For an effective attenuation of the EMI, a clock frequency variation up to 10% may be used. While many systems are able to operate properly with a system clock that has a large frequency jitter, in a conventional CAN communication module, a frequency modulated system clock would be in conflict with the requirement of the clock frequency jitter being not more than 1.5%. Attempts to supply the CAN communication module with a jittery clock have resulted in limited bit timing setups. These solutions are problematic in terms of conformance to the CAN Standard and entail expensive conformance tests for each application's CAN bit timing setup.